1. Field of the Invention
The present invention relates to apparatus and method for forming an electrical connector assembly and, in particular, to the use of pairs of mating dimples as the coupling medium.
2. Description of Related Art and Other Considerations
While technological improvements in the design and performance of electrical components and systems have been greatly heralded, one of the most common and recurring problems associated with such components and systems is the failure to obtain electrical connections which are reliable and secure. Therefore, such advanced technologies become useless in the absence of a suitable and practical means of interconnections.
Specifically, complex subassemblies interconnecting thousands of integrated circuits and small devices must be repairable, accessible and interchangeable for cost effectiveness. Multilayer printed circuit board assemblies with fine lines and high speed devices can no longer be interconnected with available microconnectors.
Conventionally, solder connections have been used many times in place of non-solder type interconnections. However, ordinary solder attached type connectors with fine pitch have inherent problems, such as cold solder, the ability to be inspected, connect/disconnect capabilities, alignment, and difficulties with installation on large input/output with fine lines. They are difficult to inspect for reliability and, therefore, have less than adequate reliability. They are further difficult to repeatedly connect and disconnect. In addition, ordinary solder attached connectors are becoming obsolete due to their pin limitation, volume and weight.
Therefore, non-solder type interconnections have been reconsidered. An interconnection mechanism involving no solder or weld is very desirable so long as it provides low weight, volume and high reliability at lower cost. Such non-solder or weld interconnection mechanisms must fulfill all the positive features of micro-connectors, must withstand harsh environments such as shock, large temperature excursions and vibration, and must be cost effective within design constraints.
Nevertheless, even with present high technology mechanical interconnection mechanisms and systems, there still remains a large problem in maintaining reliable interconnections.
According to the October 1988 issue of Electronic Packaging & Production, seven of the eighteen F-111 aircraft sent on the U.S. mission in Libya were forced to turn back because of avionics problems traced to connector malfunctions. The smallest misalignment of connector plates and trays, coupled with vibration of the aircraft, were major reasons for avionic failures, even though many of these systems incorporating the malfunctioning connectors later checked out as "good" once they were removed from the aircraft and tested.
Present multichip modules comprising VLSI (very large-scale integration), TAB (tape automated bonding) and Chip-On-Board devices offer lower component package cost, lower weight/profile, greater density, improved reliability, improved electrical performance and greater design flexibility, etc. By themselves, they are useful components without suitable means of interconnections.
Various industry surveys show that over 150 electronics manufacturers throughout the world have launched nearly 500 Tape Automated Bonding (TAB) projects in either pilot projects or full production in the past 2 years. In Japan, most consumer electronics applications use TAB because of all the known advantages which TAB offers. The main motivation for its use is the requirement to interconnect devices with more than 100 input and output (I/O) terminals, and to pre-test and burn-in VLSI chips for higher reliability and lower life-cycle costs. Most high density multichip packages require the use of multilayer substrates with fine lines, high-speed connections, and a high number of I/O terminals. The basic substrate is made of flat alumina ceramic with Tungsten-metalized inner layers for power and ground with precious metal layers. TAB is an advanced packaging technique that enjoys a number of advantages compared to conventional techniques, including faster production throughput, high reliability, lower costs and improved yields.
To fully realize the benefits of TAB, Chip-On-Board, VLSI, Surface Mounted integrated circuits and Hybrids, the interconnection process itself must be carefully examined and meticulously analyzed not only from technical, reliability, maintainability, test and qualification standpoints, but also from cost and technology related compatibility factors.
Small surface mounted components are particularly susceptible to heat damage and improper soldering and handling techniques.
Historically, connector related technology is far behind development in other devices such as integrated circuit technology. The reason for this is that most new devices are tested in research and development (R & D) laboratories after bread-boarding and debugging. Most devices are interconnected with ready made printed wiring boards, regular type connectors and bundles of wires soldered to the board or device leads. During this period of device development, the connector industry is unaware of, or cannot afford to keep up with higher density, high count I/O terminals, high-speed and other improvements that is required by the new and sophisticated technology/component development. This lag is always felt by most packaging engineers and designers. For the most part, after they have conducted exhaustive literature searches and catalog requests from various known connector vendors, a set of connectors is selected for the project, with size availability, delivery and cost as the main factors for selection. This process is dictated by the designer with the factor of availability being at the forefront of all other considerations. However, while the connector selection process is still being conducted, most of the other items in the design, such as chassis, motherboard guides and accessories, are configured and going through the design completion phase. This delay in selection leaves a very limited schedule and funding for connector development.
In recent months, because of Chip-On-Board, ASIC (application specific integrated circuit), VHLSI (very high large scale integration), TAB (tape automated bonding) and multichip module technologies, many projects including large connector companies are putting research and development (R&D) effort in solving design problems associated with subassembly interconnections. Under this condition and due to high I/O count, the solderless interconnection system is becoming more attractive.
The printed circuit board industry continues to provide the basic building blocks of the electronic industry. Printed circuit boards in various forms, shapes, various number of layers and materials are today's space-saving command modules for thousands of electronic products such as computers, telecommunications equipment, automotive and appliance controls, radios and televisions as well as aerospace and defense electronics. A major change in packaging and interconnection technologies is taking place which will by-pass many limitations through surface mounting of components replacing the traditional dual-in-line packaging originally started in the sixties.
For all of these systems and components, reliable and low-cost interconnections, having repeatable connect and disconnect capabilities are needed.